CPU Internals & Registers
Embedded → Computer Architecture
Follow the registers during one instruction
Registers give a CPU places to keep addresses, operands, and results. A debugger shows only part of the internal implementation.
Fetch
The program counter identifies the next instruction address. The core fetches that instruction.
PC → instruction memoryFor ADD r0,r1,r2, which register receives the result?
Reveal explanation
r0 in this illustrative destination-first notation. r1 and r2 provide the input values.
A CPU, reduced to what actually matters
At the level a firmware engineer needs, a CPU is: an ALU (does arithmetic/logic), a control unit (decides what to do next), and a small named set of registers. That's the whole picture — Digital Electronics showed you how hardware thinks at gate level; this is how a full processor thinks one level up.
| Register | Holds |
|---|---|
| PC (program counter) | address of the next instruction to fetch |
| SP (stack pointer) | address of the top of the current call stack |
| LR (link register, Cortex-M) | return address for the in-flight function call |
| R0-R12 (general-purpose) | compiler-allocated scratch space for your C variables |
Making the debugger's register view legible
PUSH will land. Naming these correctly turns the register view into a map instead of noise.Try it — step the fetch loop and watch registers update
Each click fetches one instruction, shows it, and applies its effect to the register file. Watch PC advance and R0/R1/SP change one instruction at a time.
→ 0: MOV R0, #5
1: MOV R1, #3
2: ADD R0, R0, R1
3: PUSH {R0}
4: SUB R0, R0, #1Practice
Completion saves automatically after you read through to the end.
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